Processor: |
030@50Mhz (PGA, Socketed) |
FPU: |
68881 or 68882 (PGA or PLCC depending on PCB) at CPU or seperately-clocked frequency. |
MMU: |
Internal |
Max Ram: |
Up to 264MB (8MB + either 128MB or 256MB typical) |
Ram Type: |
SRAM. |
THIS ENTRY IS UNDER CONSTRUCTION (10/10/2024)
An accelerator which plugs into the CPU Fast slot of the A2000. This accelerator is based on a modern rework of the C= A2630 with a 50MHz 68030 CPU, 4-8MB of Zorro II 32-bit FastRAM, a high performance IDE interface, plus a Zorro III FastRAM bank of 32, 64, 128, or 256MB. All memory is modern SRAM. The IDE interface can natively support a CF Flash Media card and/or up to a total of 2x IDE devices using the 40-pin IDE connector. The N2630 ROMs provide a fall-back mode where the card can be switched to use only the native 68000, primarily for compatibility with old and broken software. This fallback mode disables all other functions on the card. The ROMs also provide the driver for booting from the IDE interface.
Jumpers (WIP)
Jumper |
Shorted |
Open |
J404 (Z2 RAM)
|
4MB AutoConfig |
8MB AutoConfig |
J302 (A2000/B2000) |
4 Layer German Rev 4.0 A2000 motherboards, and the motheroard 68000 must be removed. (Not supported until PCB Rev 4.0.1a/b)
|
For the common 2-layer B2000 motherboards (4.x/6.x). |
J304
(Default OS) |
Boot Unix |
Boot Amiga OS |
J403 (Z2 RAM) |
Disable RAM |
Enable RAM |
J405 (Z3 RAM) |
Disable RAM (required for <OS 2.04*) |
Enable RAM |
J202 (FPU Clock) |
FPU is clocked by the x2 oscillator socket. |
FPU is clocked by the CPU oscillator
|
* - The high-mapped Zorro III memory can be added when set this way using an AddMem command on pre-OS 2.04 systems. A bug is reported regarding Kickstart 1.3 and the Zorro III memory setting as of March 2024 / unresolved as of October 2024. See the support website (link below) for current information.
Additional jumpers tables on the rear silkscreen describe the Zorro III Memory bank SRAM component capacity and bank population/configuration. They are typically set when the board is built to the buyers configuration request and changes are normally not needed after the board is built. The SRAM is surface-mount soldered at build time and not removable.
The memory subsystem supports 68030 burst mode reads for both the Instruction and Data cache. Enabling this CPU option setting is recommended for most configurations (i.e. Data Burst may not always be enabled by default with modern tools/libraries).
As with the C= A2630, hold the left mouse button down at boot time to be able to select 68000 mode. Reboot to re-enable accelerator mode and all card resources.
Support for up to two IDE devices. One IDE device can be a Compact Flash. Devices can be of type Cable Select. It is posible to force Master or Cable Select using J901 and J905.
There is a 3-pin header (CN6) at the front of the card for an IDE activity LED. PCB Rev 4.1.0a/b changes the polarity of this jumper and adds some signal buffering.
Selectable PIO 0/2/4/Ultra speed options to match your target IDE device(s) using J902/J903. The highest performance can be obtained with some Sandisk Ultra CF media types and setting the Ultra mode (8-9K/sec reads seen). Other CF/IDE media may require using a slower setting for reliability. A mixture of dissimilar speed IDE devices may also require using a slower common setting.
N2630 support website for building and support is located on Github: https://github.com/jasonsbeer/Amiga-N2630
The IDE interface uses the LIDE driver which is developed/maintained on Github: https://github.com/LIV2/lide.device. Updating the driver requires combining the driver and the C= A26x0 Accelerator -07 Boot ROM Images and programming them into 2x 27C256 EPROMs.
Common tools/libraries which support the 68030 CPU cache controls, MMU, and optional Kickstart remap all work with this accelerator (MuLibs, SetCPU, etc). Remapping Kickstart is recommended for best performance, as is enabling Burst. Memory speeds are excellent.