| Processor: |
060@50Mhz |
| FPU: |
Internal |
| MMU: |
Internal |
| Max Ram: |
128MB |
| Ram Type: |
4 x 72pin SIMM slots. |
An accelerator which plugs into the CPU Fast slot. It also includes an onboard SCSI controller (Symbios Logic 53C710) with a 50pin internal connector.
Jumpers
| Jumper |
Function |
| JP1 |
CPU Select
ON=68060
OFF = Motherboard Processor |
| JP2 |
RESERVED |
| JP4 |
Cache Burst to A4000 Motherboard
ON = Enabled
OFF = Disabled |
| JP5 |
Interrupt Pending, DMA Backoffs
ON = DMA Backsoff Interrup
OFF = DMA Ignores Interrupt |
| JP6 |
Active SCSI Termination
ON = SCSI Termination Disabled
OFF= SCSI Termination Enabled |
| JP7 |
CPU Clock Disable (Test Only)
ON = Clock Disabled
OFF = Clock Enabled |
| JP8 |
CPU Clock
Pins 1 and 2 = 68040
Pins 2 and 3 = 68060 |
| JP9 |
CPU Power
Pins 1 and 2 = 5V (040)
Pins 2 and 3 = 3.3V (060) |
| CN6 |
5V Fan |
| CN8 |
SCSI LED Indicator |
| JR1 |
Memory Burst Mode
ON = Burst Mode Support (Min 2 SIMMs Required)
OFF = Non Burst Mode |
| JR2 |
DRAM Speed versus CPU Clock OFF
@ 50 Mhz OFF = 60ns
@ 50Mhz ON = 70ns
@ 40Mhz OFF = 60/70ns
@40Mhz ON = 80ns
@ 33Mhz OFF = 60/70/80ns |
| JR3 |
Burst Write Enabled
ON = Write Enabled |
| JR4 |
Burst Read Enabled
ON = Read Enabled |
| JR5 |
Memory Size
ON = 16MB
OFF = 4MB |
| JR6 |
SIMM Type
OFF = Single Sided
ON = Double Sided |
| JR7 |
Reserved |
| JR8 |
Refresh Mode
OFF/ON = 4k Refresh (Asymmetrical)
OFF = 2k (Symmetrical) |
All four SIMM sockets can support either 4MB or 16MB single sided SIMMs or 8MB or 32MB double sided SIMMs of the common 72-pin type, depending on the settings of JR5 and JR6 as shown below
JR5 OFF, JR6 OFF
CN1 8000000-83FFFFF
CN2 8400000-87FFFFF
CN3 8800000-8BFFFFF
CN4 8C00000-8FFFFFF
JR5 OFF, JR6 OFF
CN1 8000000-8FFFFFF
CN2 9000000-9FFFFFF
CN3 A000000-AFFFFFF
CN4 B000000-BFFFFFF
JR5 OFF, JR6 ON
CN1 8000000-8FFFFFF
CN2 8800000-8FFFFFF
CN3 9000000-97FFFFF
CN4 9800000-9FFFFFF
JR5 ON, JR6 ON
CN1 8000000-9FFFFFF
CN2 A000000-BFFFFFF
CN3 C000000-DFFFFFF
CN4 E000000-FFFFFFF
Note: Burst Mode will only function properly when there are an even number of SIMMs.
T-REX II Support Site
Zorro II Memory Note: It has been discovered with extensive testing that by allowing any 68040 or a 68060 to run 'burst' cycles against Zorro II 16-bit 7MHz memory is an inefficient activity. Most 16-bit Memory in fast systems like this is relegated to last-resort use and for I/O buffering activity (for 24-bit DMA controlers like the A2091 and GVP Series II SCSI controllers). Use the MuTools mmu.library, and use MuSetCacheMode (or the mmu-configuration file) to render any 16-bit memory in the system as NoCache - this will prevent burst cycles, and thereby improve performance when the system uses this memory. If the 16-bit memory is already only used for 24-bit DMA buffering, no benefit comes from caching. The latest MuTools release (Q1 2021) also attempts to identify these situations and prevent caching to Z2 16-bit RAM with a tool configured during the Installer script.